On this website we collect a few benchmarks including relevant papers. See also our collection of code and our online generator.
Note that in all benchmarks shown, Spiral code was generated ("push-button"), i.e., written by a computer. Learn about the current Spiral system.
On the left side we consider the discrete Fourier transform only but different parallel platform paradigms:
On the right side we consider different numerical kernels
SMP (Multicore)/Vector Code
Our generated multi-threaded code uses a fast barrier.
4-way vectorized, up to 4 threads:
2-way vectorized, up to 4 threads:
4-way vectorized (all small sizes):
4-way vectorized (split-complex format):
Graphics Processing Unit (GPU)
this is work in progress ...
Distributed Memory Parallel (Cluster)
FFTW is available online.
Verilog for FPGAs
FPGA Accelerated Software
IPP is Intel's vendor library.
Our work on other functionality is not yet included in the Spiral program generation framework. Please visit our software site or our hardware site or check representative publications or jump directly to one of the following: